Merlin 4

→ mechanical design, thermal analysis, EMI/environmental sealing, structural tolerancing 🛠️

→ oct 2025 - present 📅

→ merlin 3 datasheet 🔗

role

I am the lead mechanical engineer on the Merlin 4. My task was to lead the mechanical design for the upgrade from the Merlin 3, under a hard constraint: keep the existing form factor. The electrical engineering team was overhauling the internals in parallel, so my job was to give them room to work while keeping the unit thermally, structurally, and environmentally sound.

What the Merlin does

[Insert the BD blurb here, trimmed to 2–4 sentences, the "hot-swap / no excuses" one is good and on-brand]

the constraint

Merlin 3 handled 150W. Merlin 4 had to handle 300W, double the power dissipation, in the same enclosure, with a user-touchable surface required to stay under 70°C per MIL-STD-810, or the unit would ship with a heat warning label.

That single number (70°C) shaped almost every decision downstream.

layout & clearance

I started by taking the Merlin 3 model and building an interface and "usable space" map for the layout team, accounting for PWB and aluminum enclosure tolerances up front.

From there it was iterative: initial layout → interference check → clearance check → repeat. The complexity here was that Merlin 4 has two PCBs in close proximity, one on the main chassis, one on the lid, so I was tracking component heights on both boards simultaneously, not just footprint.

thermal model

Once the EE team had power-dissipating components identified, I built a thermal model:

• Chassis material: 6061-T6 aluminum
• Pulled junction-to-board and junction-to-case resistance from every power-dissipating component’s datasheet
• For components facing the chassis, added a boss to create a direct conduction path, with a thermal pad sandwiched between component and chassis
• Ran tolerance analysis to keep pad compression under 20 psi at max compression, while guaranteeing contact at min compression
• Calculated pad thermal resistance at worst-case compressed thickness
• Ran a trade study across thermal pad candidates to find the best balance of compression retention and thermal resistance given machining and PCB height tolerances
• Derived PCB thermal resistance (XY and Z) from the actual layer stack-up, dielectric material and copper density per layer

simulation & margin

I modeled two boundary conditions:

• Convection only (CFD, natural convection)
• Convection + radiation

Both scenarios produced component temperature rises that I checked against datasheet limits, components were within spec. To quantify actual margin rather than just "passing," I derated every component per EEE-INST-002 and went through the BOM part by part to confirm margin held.

Result: every component survives worst-case environments with margin. The chassis surface, however, exceeds 70°C, the unit is thermally safe for the electronics but too hot to touch. That’s the open item heading into build.

EMI gasket trade study

Separately, I looked at the EMI/environmental gasket. Merlin 3 used a gasket with an unusual groove feature and no documentation explaining why it had been chosen, it had simply passed EMI testing once and stayed. I’d had better results with Parker gaskets at higher frequencies in past work, so I built a test fixture and prepared an R&D Merlin 3 unit to compare.

Since there’s no locked customer spec yet for Merlin 4, systems and BD asked whether we could push for an IP67 rating.

• New Parker gasket: better EMI suppression at high frequency, failed the dunk test
• Legacy gasket: passed IP67

With test engineering approval, I ran the R&D unit again on the legacy gasket to see how much margin it had, and it passed IP68, securing a better rating than originally scoped.

status

The unit is fully designed and verified analytically. Parts are on order for the build phase, where the design will be validated against real thermal, structural, and environmental test data, including resolving the 70°C surface temperature finding.